TX0DBMTRIMREGVREF=v_900m, TX0DBMTRIMTAPCAP=cap_0F, TX0DBMTRIMPREDRVREGIBNDIO=vreg_1p127, TX0DBMTRIMPREDRVREGPSR=disable, TX0DBMTRIMPREDRVREGIBCORE=i_4u, TX0DBMTRIMREGFB=vo_vi_0p475, TX0DBMTRIMPREDRVSLOPE=slope_0
| TX0DBMTRIMPREDRVREGIBCORE | TX0DBMTRIMPREDRVREGIBCORE 0 (i_4u): undefined 1 (i_5u): undefined 2 (i_6u): undefined 3 (i_7u): undefined |
| TX0DBMTRIMPREDRVREGIBNDIO | TX0DBMTRIMPREDRVREGIBNDIO 0 (vreg_1p127): undefined 1 (vreg_1p171): undefined 2 (vreg_1p209): undefined 3 (vreg_1p244): undefined 4 (vreg_1p275): undefined 5 (vreg_1p305): undefined 6 (vreg_1p335): undefined 7 (vreg_1p363): undefined 8 (vreg_1p388): undefined 9 (vreg_1p414): undefined 10 (vreg_1p439): undefined 11 (vreg_1p464): undefined 12 (vreg_1p486): undefined 13 (vreg_1p506): undefined 14 (vreg_1p525): undefined 15 (vreg_1p545): undefined |
| TX0DBMTRIMPREDRVREGPSR | TX0DBMTRIMPREDRVREGPSR 0 (disable): undefined 1 (enable): undefined |
| TX0DBMTRIMPREDRVSLOPE | TX0DBMTRIMPREDRVSLOPE 0 (slope_0): undefined 1 (slope_1): undefined 2 (slope_2): undefined 3 (slope_max): undefined |
| TX0DBMTRIMREGFB | TX0DBMTRIMREGFB 0 (vo_vi_0p475): undefined 1 (vo_vi_0p500): undefined 2 (vo_vi_0p525): undefined 3 (vo_vi_0p550): undefined 4 (vo_vi_0p575): undefined 5 (vo_vi_0p600): undefined 6 (vo_vi_0p625): undefined 7 (vo_vi_0p650): undefined 8 (vo_vi_0p675): undefined 9 (vo_vi_0p700): undefined 10 (vo_vi_0p725): undefined 11 (vo_vi_0p750): undefined 12 (vo_vi_0p775): undefined 13 (vo_vi_0p800): undefined 14 (vo_vi_0p825): undefined 15 (vo_vi_0p850): undefined |
| TX0DBMTRIMREGVREF | TX0DBMTRIMREGVREF 0 (v_900m): undefined 1 (v_912p5m): undefined 2 (v_925m): undefined 3 (v_937p5m): undefined 4 (v_950m): undefined 5 (v_962p5m): undefined 6 (v_975m): undefined 7 (v_987p5m): undefined |
| TX0DBMTRIMTAPCAP | TX0DBMTRIMTAPCAP 0 (cap_0F): undefined 1 (cap_0p35pF): undefined 2 (cap_0p7pF): undefined 3 (cap_1p05pF): undefined 4 (cap_1p4pF): undefined 5 (cap_1p75pF): undefined 6 (cap_2p1pF): undefined 7 (cap_2p45pF): undefined |